Monday November 1, 2004 From: EDACafe

About This Issue   More Assertions 

   October 25 - 29, 2004 , 2004 By Dr.
   Jack Horgan Read business product
   alliance news and analysis of weekly
   happenings


 Introduction

 This week's editorial follows up last week's on 
 Assertion Based Verification (ABV) by including 
 @HDL another vendor focused on this important area 
 and also relevant product announcements by Cadence 
 and Mentor Graphics. In addition this editorial 
 presents updates on Intel and Google that were 
 subjects of previous editorials. 



 @HDL Incorporated

 @HDL was founded in April 1999 by Badruddin 
 Agarwala, Vivek Bhat, and Tarak Parikh, former 
 founders of Frontline Design Automation, a Verilog 
 simulation company acquired by Avant! in 1997, and 
 Yusuf Attarwala from SGI. @HDL is a privately-held 
 company that received first round funding in early 
 2000. Investors and board members include Dr. 
 Prabhu Goel former founder and CEO of Gateway 
 Design Automation Corporation, and S. Atiq Raza, 
 former President and COO at AMD. The firm is a 
 founding member of PSL/Sugar Consortium that 
 promotes the use of PSL within the industry.

 @HDL is pioneering the use of Adaptive Functional 
 Verification (AFV) technology that combines the 
 formal and simulation approaches with 
 SOC/system-level design analysis and debugging. 
 Adaptive Functional Verification is the selective, 
 automatic application of formal model checking and 
 dynamic simulation algorithms based on the 
 property and complexity of the RTL code comprising 
 the IP blocks and SOC. 

 “An adaptive approach that uses automatic formal 
 model checking along with intelligent-random 
 simulation, and high-level RTL analysis/debugging 
 can dramatically improve verification times and 
 shorten the overall cycle. In short, designers 
 need an "Intelligent RTL Testbench" methodology 
 that fully automates the verification flow for 
 complex SOCs.”

 In May 2003 @HDL announced it had licensed IBM's 
 premium RuleBase formal verification technology 
 offering high-performance static analysis of very 
 large chip designs. This technology had been 
 developed at IBM Haifa Research Labs.

 In November 2003 @HDL introduced major update to 
 its family of functional verification solutions. 
 The Assertion Studio technology had five major 
 components. Visualizer reads in assertions 
   written in either PSL or SV and automatically 
   creates the equivalent timing diagram for the 
   assertion sequence.

   Interpreter verifies assertions and assertion 
   fixes by directly applying the PSL or SV 
   assertion on simulation waveform data without 
   having to re-run the edited assertion either 
   formally or through simulation.

   Explorer helps determine why a violation 
   occurred during simulation or formal model 
   checking by generating waveforms that show the 
   sequence of events leading up to the violation 
   and decomposing a complex PSL or SV assertion 
   into its constituent sub-expressions and 
   detailing precisely which part of the assertion 
   was violated.

   Assessor reports whether or not certain 
   transactions occurred during simulation. A query 
   language mechanism makes it easier for the user 
   to find out exactly which transactions occurred 
   and when. Coverage metrics are also available to 
   measure design activity during simulation and to 
   complement other metrics such as code coverage 
   and testbench functional coverage.

   Engine technology takes the user-written 
   assertions in PSL or SV and outputs 
   simulate-able and synthesizable Verilog to allow 
   smooth interoperability immediately. 
 The @HDL product line consists of two tools, 
 @Verifier and @Designer that form the basis of the 
 company's AFV solution. @Verifier finds RTL bugs 
 earlier in the design cycle by using formal model 
 checking to verify automatically generated or 
 user-written assertion. @Verifier automatically 
 identifies design constructs like FIFOs and FSMs 
 and generates assertions to check for common 
 problems including one-hot drivers and decoders, 
 parallel and full case statements, unreachable and 
 terminal state, never reachable conditions and 
 codes, FIFO read/write and reset errors, 
 index-out-of range, and stuck at zero/one. 
 Automatically generated assertions can be verified 
 formally, or written out in SystemVerilog or PSL 
 for use in simulation. @Verifier-ZX combines 
 @Verifier's ease-of-use with IBM's RuleBase solver 
 technology. @Verifier-DP runs multiple assertions 
 in parallel, leveraging existing server farms to 
 achieve linear speed improvement. @Verifier 
 Multiple Clock Domain Verification/Analysis 
 (MCDVA) automatically identifies master clocks, 
 clock tree, clock domain crossing and 
 synchronizers. The module provides both structural 
 and functional domain verification. @Designer 
 delivers graphical debugging and design analysis 
 environment to isolate functional errors during 
 creation, formal model checking, simulation, and 
 synthesis of Verilog-based designs. The module 
 offers source code debugging, memory viewer and 
 waveform viewer. Pricing is around $150,000 for a 
 three year license.

 @HDL lists among its customers SiNett, Raza 
 Foundries, Onnotech (Toshiba), Fujitsu Labs 
 America, MegaChips, Oki Semiconducror and AMD. 
 @HDL is a member of the Cadence Connections 
 Program, the Mentor Graphics) Value Added Partners 
 program and the Synopsys in-Sync Program. 

 I spoke with Tarak Parith the VP of Product at 
 @HDL. He said that the privately held company has 
 about thirty customers and 15 to 20 employees. The 
 firm employs a direct sales force and a rep in 
 Japan. Tarak believes that formal verification is 
 still a missionary sale. It is difficult to 
 crystallize benefits for prospects. He sees the 
 challenges facing more rapid adoption are the 
 relatively new languages that must be learned, the 
 lack of useable tools and the performance impact 
 on simulation execution. Formal verification is 
 not for everyone. While basics assertions are 
 simple and straightforward to compose, expressing 
 complex behavior can be difficult without proper 
 training, support and tools. Rather than 
 attempting to use formal verification everywhere, 
 he recommends having a dedicated, knowledgeable 
 team focused on problem areas. Tools are required 
 to constrain the design to limit unrealistic 
 failures and to analyze the cause of assertion 
 failure. On the other hand he sees automated 
 assertion generation becoming commonplace.

 On October 18th Cadence announced a comprehensive 
 assertion-based verification (ABV) solution as a 
 part of its Incisive functional verification 
 platform. The solution speeds verification of 
 complex designs by creating an environment that 
 helps users define assertions correctly, enables 
 early detection of bugs close to the source, and 
 monitors for completeness through assertion 
 coverage. This functionality has been integrated 
 into the platform's Incisive Unified Simulator. It 
 includes broad, native assertion support for 
 Property Specification Language (PSL), 
 SystemVerilog Assertions (SVA) and Open 
 Verification Library (OVL). In addition to these 
 Accellera standards, Cadence is also introducing 
 an extended open-source library of assertions. 
 This Library incorporates 50 complex assertion 
 statements and code for customization. This 
 library will be available in both PSL and SVA 
 languages. A sample set of library elements is 
 posted on the web and available for review.

 On October 11th Mentor Graphics announced key 
 extensions to its Scalable Verification solution 
 with a new version of its ModelSim simulator and 
 advanced verification technology from the recently 
 completed acquisition of 0-In Design Automation.

 With the ModelSim 6.0 simulator and the 0-In 
 product line, Mentor Graphics now offers 
 standards-based support for the most advanced 
 verification methodologies, the press release 
 said. Offering support for assertion-based 
 verification and coverage-driven verification 
 flows, as well as verification IP, the Scalable 
 Verification platform offers engineers a faster 
 way to reach verification closure than current 
 methods.

 According to Robert Hum, VP and GM for Mentor's 
 Design Verification and Test Division, existing 
 verification methodologies have run out of steam. 
 "Designers are looking for new solutions that can 
 dramatically increase their productivity. 
 Methodologies and tools like assertions, static 
 analysis, functional coverage, and coverage-driven 
 verification are required to close the 
 verification gap."

 On Oct. 12, 2004 Intel Corporation announced its 
 results for the third-quarter. Total revenue of 
 $8.5 billion was up 5% sequentially and up 8% 
 year-over-year. Third-quarter net income was $1.9 
 billion, up 8% sequentially and up 15% 
 year-over-year.

 The gross margin percentage for the quarter was 
 55.7 percent, as compared to the revised 
 expectation of approximately 58 percent, plus or 
 minus a couple of points, primarily due to higher 
 than expected inventory reserves; higher than 
 expected motherboard and chipset units and lower 
 than expected processor units in the revenue mix; 
 and an inventory write-down as a result of lower 
 chipset unit costs.

 The effective tax rate for the quarter was 21.4 
 percent, lower than the July expectation of 
 approximately 31 percent and below the September 
 expectation of approximately 29.5 percent. The 
 September expectation reflected the impact of a 
 higher percentage of profits being generated in 
 lower-tax jurisdictions.

    
   Table 1 Geographic Breakdown of Intel Revenue 

 In the last quarter Americas accounted for 21% of 
 total revenue, AP 47%, Europe 22% and Japan 9%. 
 Since the same period a year ago the Americas 
 percentage of total revenue has dropped around 7%, 
 while AP's percentage has grown by roughly the 
 same amount.

    
   Table 2 Intel Revenue by Business Segment 

 The Intel Architecture operating segment's 
 products include microprocessors and related 
 chipsets and motherboards. Beginning in 2004, the 
 company combined its communications-related 
 businesses into a single organization, the Intel 
 Communications Group (ICG). ICG's products include 
 flash memory; wired Ethernet and wireless 
 connectivity products; communications 
 infrastructure components such as network and 
 embedded processors and optical components; 
 microcontrollers; application and cellular 
 processors used in cellular handsets and handheld 
 computing devices; and cellular baseband chipsets.

 The architect business segment accounted for 84% 
 of total revenue and in turn microprocessors 
 accounted for 83% of that revenue. The ICG 
 business unit accounted for 16% of total revenue. 
 Flash memory accounted for almost half of this 
 revenue.

 “Intel delivered growth in both of its major 
 businesses in the third quarter driven by record 
 server and mobile microprocessor shipments and 
 market segment share gains in flash memory," said 
 Intel CEO Craig R. Barrett. "Growth was not as 
 high as we originally anticipated due to inventory 
 adjustments at some of our major customers and 
 lower than expected overall demand for PCs.”

 "Intel crossed over to 90nm technology in 
 microprocessor shipments to the computing market 
 segment for the quarter and built 65nm memory 
 chips containing more than half a billion 
 transistors each, reflecting the company's 
 long-term strategy of investing in leading-edge 
 process technology. We also returned more cash to 
 our stockholders with a $2.5-billion share 
 re-purchase, our largest ever."

 In recent months, Intel has made a number of 
 changes in its product plans. In June a 
 manufacturing glitch forced a small recall of chip 
 sets, which handle communications between the 
 processor and the rest of the system. Then, in 
 July, the company said design problems would delay 
 the release of mobile computer chip set dubbed 
 Alviso until next year. The firm also said 
 better-than-expected performance in manufacturing 
 of Pentium 4s resulted in an inventory buildup. In 
 August Intel indefinitely postponed the launch of 
 a video display chip for rear-projection 
 televisions, deciding to improve picture quality 
 before sending the chip to market. On October 22nd 
 Intel announced that it had cancelled plans for a 
 Pentium 4 processor at 4GHz and said it would 
 refocus those resources on other chip 
 enhancements. The cancellation is the most recent 
 in a series of moves that underscore the company's 
 shift from its traditional focus-- increasing 
 clock speed-- to enhancing other aspects of the 
 chip design.

 On October 24th Intel Corp. announced that it 
 canceled a project to develop a chip for 
 projection TVs and said it planned to focus its 
 resources in other areas. The company's plans to 
 develop a liquid on crystal silicon chip, or LCoS, 
 were first unveiled in January during the Consumer 
 Electronics Show in Las Vegas. In August, Intel 
 said it would not be released by the end of the 
 year, as originally announced. LCoS competes 
 against other new display technologies that have 
 already invigorated the rear-projection TV market, 
 most notably the digital light processing (DLP) 
 chip pioneered by Texas Instruments Inc. Intel had 
 claimed that this chip would help cut the cost of 
 big-screen high-definition television sets to less 
 than $2,000 by 2005.

 These are challenging times for Craig Barrett, 
 Intel CEO since 1998. The former Associate 
 Professor of Material Science and Engineering at 
 Stanford has reached Intel's mandatory retirement 
 age and will leave his office in May 2005. In July 
 he wrote an open letter to the company's 80,000 
 employees which stated that he had spoken "bluntly 
 and directly" with senior managers about the need 
 to improve performance.

 "Our business is complex, and we have set high 
 expectations for ourselves. Therefore, it is 
 critical that everyone--beginning with senior 
 management but extending to all of you--focus 
 intensely on actions and attitudes that will 
 continue Intel's strong track record of technology 
 leadership leading to outstanding company 
 performance and satisfied customers." 

 There are many reasons for these, but in the end, 
 the reasons don't matter, because the result is 
 less satisfied customers and a less successful 
 Intel. I believe, as you do, that this is not the 
 Intel we all know and that it is not acceptable.” 

 Although a much smaller (~15% the size) firm AMD 
 (Advanced Micro Devices) is seen as an Intel 
 competitor on the technology front. As recounted 
 in earlier editorial AMD's chips offering 
 high-performance, simultaneous x86-based 32- and 
 64-bit computing were seen as a case of 
 one-upmanship. At the end of August AMD announced 
 that it was demonstrating the industry's first x86 
 dual-core processor on 90nm process technology. 
 HP, IBM and Sun Microsystems, among others, 
 announced support for AMD's dual-core technology. 
 Microsoft gave an assist by adopting AMD's 
 recommendation when it announced that software 
 licensed on a per-processor basis will continue to 
 be licensed that way when installed on hardware 
 containing dual-core and multi-core processors. 
 Now on the heels of Intel's announcement canceling 
 plans for a Pentium 4 processor at 4GHz, AMD 
 announced on October 19th the Athlon™ 64 FX-55 
 processor for performance-hungry enthusiasts and 
 hard-core gamers and the Athlon 64 processor 
 4000+. AMD Athlon 64 processors are the first 32- 
 and 64-bit desktop and mobile processors designed 
 with Enhanced Virus Protection (EVP) capabilities. 


    
   Table 3 AMD Financial Performance 

 “Our third quarter net income improvement was 
 largely driven by a 21 percent sequential increase 
 in Computation Products Group (CPG) sales and 
 improved gross margin in the Memory Group,” said 
 Robert J. Rivet, AMD's chief financial officer. 
 “AMD64 processor sales represented over one-third 
 of our total CPG sales. Sales growth was driven by 
 both higher average selling price (ASP) and 
 increased unit volumes.

 On October 28th to foster the rapid adoption of 
 technology in high-growth markets throughout the 
 world, AMD formally unveiled a business strategy 
 with initial participants in India, Mexico and the 
 Caribbean to enable 50 percent of the world's 
 population with Internet connectivity and 
 computing capabilities by 2015. As part of its 
 50x15 strategy, AMD is announcing the Personal 
 Internet Communicator (PIC), an innovative 
 consumer device that enables affordable, managed 
 Internet connectivity and offers Microsoft 
 Windows-based computing capabilities to help 
 fulfill the communication, education and 
 entertainment needs of people in high-growth 
 markets.

 The stock market's reaction to AMD and Intel is 
 shown in the chart below. 

    
   Figure 1 Stock Performance during 2004 for 
   Intel, AMD and NASDAQ index 



 Google Inc.

 I had included some material in an earlier 
 editorial on Google because of their unusual Dutch 
 auction approach to an IPO and because I suspected 
 most Edacafe readers use Google on a daily basis. 
 Now it's time for an update following the firm's 
 October 21st announcement of its results for the 
 quarter ending September 30th. In its first 
 post-IPO quarter Google reported record revenues 
 of $805.9 million for the quarter ended Sept. 30, 
 2004, up 105% year over year. Revenue for the last 
 nine months was $2.16 billion up 126% from $954 
 million. Income from operations, on a GAAP basis, 
 was $11.1 million, or 1.4% of revenue compared to 
 $66.6 million or 16.9% of revenue for the prior 
 year's quarter. Google-owned sites generated $412 
 million or 51% of total revenue. This represents 
 an increase of 99%. Revenue generated on Google's 
 partner sites, through the AdSense programs, 
 contributed $384 million, or 48% percent of total 
 revenue, a 120% increase. Income from operations 
 includes the effects of a non-recurring, non-cash 
 charge of $201.0 million related to the previously 
 announced settlement of warrant and patent 
 disputes with Yahoo! Inc. Without this 
 non-recurring charge, Google would have realized 
 income from operations of $212.1 million or 26.3% 
 of revenues for the quarter. Net income on a GAAP 
 basis was $52.0 million. Net income before certain 
 non-recurring items was $125.0 million. Net income 
 for nine months was $195 million up from $78.4 
 million. At the end of the quarter, Google had a 
 cash, cash equivalents and short-term investments 
 balance of $1.86 billion. Google employs 2,668 
 full time employees on a worldwide basis. 

    
   Figure 2 Google Revenue and Net Income 


 The stock which went out at $85 has skyrocketed 
 while the tech-laden NASDAQ has been relatively 
 flat. 

    
   Figure 3 Google Stock Performance 



    
   Table 4 Comparison of well known Internet firms 


 “We are very pleased with the results of this 
 quarter. Record revenues, robust margins and cash 
 generation all illustrated strong performance and 
 execution over the last quarter,” said Eric 
 Schmidt, Google chief executive officer. “Our 
 commitment to users and to the development of 
 quality products and services for them clearly 
 translated into robust financial results. That 
 dedication to our users, combined with our 
 relentless technology innovation and market 
 opportunity make us very optimistic about our 
 company's future.”

 On October 25th Adobe Systems Inc and Yahoo! Inc 
 announced a strategic relationship aimed at 
 providing consumer services to internet users, but 
 financial details were not disclosed. This week 
 Adobe will introduce a co-branded Yahoo! Toolbar 
 that will provide users with access to Yahoo! 
 products including AntiSpy, Pop-Up Blocker and 
 Yahoo! Search, as well as Adobe products, the 
 companies said in a joint statement. A future 
 release of Adobe Reader, Adobe's universal client 
 software for viewing and interacting with Adobe 
 PDF files, will feature Yahoo! Search as the 
 default internet search, it added.

 Another successful Internet related IPO was 
 launched on October 25th by Israel-based 
 Shopping.com Ltd. The firm is a leading online 
 comparison shopping service. The Company gathers 
 product and merchant data from across the 
 Internet, organizes and structures it into a 
 comprehensive catalog, and presents the resulting 
 information to consumers in a user-friendly 
 interface. The company sold 6.87 million shares, 
 raising $123.7 million. Shares as of this writing 
 are at $29.20, an increase of $11.20 or 62% from 
 their $18 IPO price. This corresponds to a market 
 cap of $812 million. Not bad for a company with 
 2003 revenue of $67 million. 



 Weekly Headlines

 Toshiba Implements Its Largest Semiconductor 
 Design to Date with Cadence Digital IC Flow

 ARM and Philips' Handshake Solutions Collaborate 
 to Develop Clockless Processor

 Institute of Computing Technology of Chinese 
 Academy of Sciences Selects Mentor Emulator as 
 Verification Platform for Goodson Series CPU Chips

 Synopsys' Magellan Deployed by NVIDIA to Maximize 
 Verification Productivity on Next-Generation 
 Graphics Processing Units

 Cadence and ARM Tackle Signal Integrity Issues for 
 Foundry Program Partners with New Views

 Number Of Job Openings Explodes On TechJobsCafe & 
 EDACafe

 ATI Technologies Selects Mentor Graphics 
 VStationTBX for Advanced Verification Acceleration

 Accelerated Technology Provides Application 
 Development Platform For Embedded Developers Using 
 UML

 Synopsys Galaxy Test Reduces Test Data Volume by 
 40x and Application Time by 13x at 
 STMicroelectronics

 NVIDIA Adopts Synopsys' Physically Aware Test 
 Solution for Latest Processor Designs

 TransEDA Shows Sustained Growth After Merging 
 Verification Technologies

 Altium Widens Nexar Reach and Enables LiveDesign 
 on Any Third-Party FPGA Development Board

 New Palladium II Extends Cadence 
 Acceleration/Emulation Leadership; Cadence 
 Delivers Unparalleled Speed and Capacity to Tackle 
 the Most Complex SoC Verification

 Zarlink Expands Market-Leading Portfolio of 
 Digital Timing Chips for Networking Equipment



 Financial News

 Advanced Semiconductor Engineering, Inc. Reports 
 Consolidated Year 2004 Third-Quarter Financial 
 Results

 ON Semiconductor Reports Third Quarter Results

 LSI Logic Reports Q3 2004 Financial Results 
 Provides Q4 Business Outlook

 STATS ChipPAC LTD. Reports Third Quarter 2004 
 Results

 UMC Reports Record 2004 Third Quarter Results: 
 Record Revenue with 15% Sequential Increase in 
 Operating Income

 Fabless Semiconductor Association Announces 
 Fabless Fundings Total $1.5 Billion From Q1 
 Through Q3 2004; Fabless Industry On Pace To Raise 
 Largest Annual Amount Since 2001

 CEVA Announces Third Quarter Results - a Record 30 
 Million Units Shipped in the Third Quarter 
 Reflects Strong End Markets Growth

 Amkor Reports Third Quarter 2004 Results; Revenue 
 Up 16%
 RF Micro Devices Announces Financial Results; 
 Revenue Down 8.8%

 Atmel Reports Third Quarter Earnings Results; 
 Revenue Up 23%

 Agere Systems Reports Results for the Fourth 
 Quarter and Fiscal Year 2004; Revenue Down 13%

 Taiwan Semiconductor Reports 20% Increase in 
 Sequential EPS

 NVIDIA Announces Preliminary Financial Results for 
 the Third Quarter Ended October 24, 2004 


 More EDA in the News and More IP & SoC News